Communications receivers and transmitters that operate on multiple frequencies may be required to switch from one to a second such frequency. This switching of frequencies ordinarily entails reprogramming some form of a frequency synthesizer and waiting for such synthesizer to re-acquire frequency lock on the new frequency. In more advanced systems and applications such as scanning or packet data or TDMA or frequency hopped spread spectrum systems the length of time required to re-acquire or initially acquire lock is critical with premiums being placed on shorter lock acquisition times.
At the same time the dynamics of phase lock loop based frequency synthesizers entail a trade off or compromise between the time required for acquiring lock (lock time) and other loop characteristics such as a noise spectral density about the synthesized frequency. Generally, other things being equal a shorter lock time results in a higher noise spectral density. In numerous applications this higher noise spectral density may be considered unacceptable. Therefore practitioners have used adaptive phase locked loops of various configurations. Adaptation has often taken one of or a combination of two forms including either a two state loop bandwidth or loop gain. The broad bandwidth or high gain state is used until the phase locked loop has achieved a certain degree of lock acquisition followed by a switch to a narrower bandwidth or lower loop gain. This approach helps achieve a short lock time and an acceptable noise spectral density.
However, switching between bandwidths or switching between gains tends to generate discontinuities within the phase locked loop. Adding insult to injury, these discontinuities must be eliminated (tracked out) by the phase locked loop while such loop is in it's slowest response, i.e. low gain or narrow bandwidth, mode. Avoiding these discontinuities has been attempted in a switched bandwidth type adaptive phase locked loop frequency synthesizer but at the cost of excessive complexity and/or introduction of other potential noise sources. Therefore a clear need exists for a readily implemented phase locked loop frequency synthesizer that exhibits a fast lock time and acceptable noise characteristics.